We are seeking a motivated student to participate in a project focused on Through-Glass Via (TGV) or Through-Silicon Via (TSV) technology. This research aims to optimize the electroplating process for high-aspect-ratio (HAR) interconnects, focusing on achieving void-free copper filling and enhancing thermal-mechanical reliability in 3D packaging.

Core Responsibilities:

Via Fabrication: Assist in the laser modification or chemical etching process to create micro-vias.

Surface Pre-treatment: Perform seed layer deposition (Sputtering or Electroless Plating) to ensure metal adhesion.

Electroplating Experiments: Execute Primary and Secondary Electroplating using various current densities and chemical additives (Suppressors, Accelerators, Levelers).

Characterization: Conduct sample preparation (cross-sectioning/polishing) and analyze results using SEM (Scanning Electron Microscopy), EDS, and Optical Microscopy to detect voids or defects.

Data Analysis: Document the relationship between plating parameters and filling quality to optimize the process window.

Potential Learning Outcomes:

Through this project, the student will gain hands-on experience in Advanced Packaging techniques, learn to operate high-end Characterization Tools, and understand the industrial challenges of Heterogeneous Integration.

Academic Level: Undergraduate seniors, Master’s, or Ph.D. students. - Majors: Materials Science, Chemical Engineering, Mechanical Engineering, or Related disciplines in sciences and engineering.

Target Regions: Open to students from Thailand.

The monthly accommodation fee is approximately 4000-6000 NTD, depending on the room type.

The scholarship provides 10,000 NTD per month, with a minimum required duration of two months.

Host: Department of Chemical Engineering and Materials Science, Yuan Ze University (YZU). - Supervisor: Prof. Chien-Chih Chiang.