Laboratory & Project Background

This research and education program is centered on "Design and Implementation of Digital Circuits with Testability and Reliability." By integrating the dual objectives of academic research and specialized education, the project aims to cultivate semiconductor design talent with international competitiveness. A key focus of this initiative is to strengthen substantive collaborative relationships between our university and top-tier institutions in South Asia. The program will primarily partner with the Chennai Institute of Technology (CIT) and SRM Institute of Science & Technology in India, with on-site exchange and training sessions scheduled from June to October 2026.

Program Details & Requirements
Core Curriculum: The execution phase includes the establishment of a comprehensive training pipeline for digital circuit design and implementation. This covers complete instructional modules ranging from RTL design, logic synthesis, and verification to Design for Testability (DFT) and silicon implementation. Utilizing practical design examples as a guide, the program fosters students' systematic design thinking and problem-solving capabilities.
1.     Mentorship & Capacity: A total of two students will be selected for this program. Interns will conduct project-based designs in groups. Each group will be assigned an experienced graduate researcher serving as a Technical Teaching Assistant (TA) to assist with implementation details during the design and verification process.
2.     Financial Support: A monthly allowance of NT$15,000 will be provided to participants for a continuous period of two months. Please note that participants are generally responsible for their own travel expenses.
3.     Duration & Status: The proposed session is planned for a continuous period of three months. Students conducting their internships on the National Sun Yat-sen University (NSYSU) campus must apply for visiting student status at least one month in advance.

Internship Extension (Self-funded): Participants have the option to extend their internship for one additional month (making it a 3-month stay) under the program's name. Please note that this extension period is entirely self-funded; no additional allowance will be provided, and all expenses incurred during the third month will be the responsibility of the participants.
 

Expected Outcomes
This program seeks to:
l   Attract high-caliber international students to apply for Master’s programs at our university, thereby expanding the talent pool and increasing international diversity.
l   Deepen collaborative ties with top Indian engineering institutes to establish long-term research and talent cultivation links.
l   Promote joint research and publication between faculty and students from both sides, enhancing the university’s international academic visibility.

Through this initiative, we aim to significantly bolster our university's influence in global semiconductor education and research, realizing the vision of "fostering cooperation through education and expanding international reach through collaboration."